Block diagram

Fig. 1: DCP405 power module block diagram

Power pre-regulator

The main role of the power pre-regulator circuit is to efficiently decrease input voltage to the power post-regulator. It is based on DC/DC low EMI step-down synchronous controller (IC1). It’s output voltage (PREG_OUT+) is set to 3 V above programmed output voltage using tracking circuit built around Q3.

The pre-regulator is powered by “off-the-shelf” AC/DC power module Mean Well model LRS-EPP-48 that comes with various certifications including CE, UL, etc. that can be checked on manufacturer’s web site.

Fig. 2: Power pre-regulator

Bias power supply

The bias power supply is built around low power buck step-down converter (IC2), and thanks to coupled inductor (TR1) it provides both positive and negative rails that are further regulated with simple linear regulators (IC5, IC6) to power all analog and digital logic with +/-5 V. For better separation between analog and digital power, +5 V is split with two ferrite beads (FB1, FB2) right on the IC5 output.

The IC2 also provides POWERGOOD signal that indicates MCU what is module’s power condition. It is related to UVLO (under-voltage lockout) functionality that is controlled with voltage divider consists of R13, R16. Therefore the step-down converter will cut-off power when input voltage drops below +26.4 V, and starts again when it rises above +27.3 V.

Fig. 3: Bias power supply, DIB interface

EEZ DIB interface

The DCP405 module interface with the MCU module is accomplished over the 20-pin 0.1” right angled header (X2). Since its power output has to be isolated (“floated”) all digital control lines has to be isolated. Therefore two high speed digital isolators (IC3, IC7) are used. Additionally, 2-to-4-line decoder (IC4) is also deployed because EEZ DIB v1.0 specification offers only two SPI CS (Chip Select) lines per module and the DCP405 comes with four SPI devices.

Onboard I2C EEPROM (IC8) provides storage for module-specific information such as its ID, calibration data, working hours counters, etc. Please note that it is on the A-side of the isolation barrier, because the same I2C bus is shared among all modules (that includes AUX PS module, too).

Power post-regulator

The post-regulator regulation (“pass”) element is PNP BJT, actually two of them (Q4, Q5) connected in parallel with current balancing power resistors (R25, R29). Their thermal coupling is also good since they are sharing the same heatsink and are mounted close to each other as shown on Fig. 4.

The output voltage is controlled by two control loops: constant voltage (by IC9A, IC9B), and constant current (by using IC10A and IC11). In general, only one can be active at a time. Diodes D11 and D13 ensure that the output signal from one of the control loops does not affect the other loop.

Fig. 4: Heatsink side view

Fig. 5: Post-regulator with down-programmer

The precision +2.5 V voltage reference (IC15, Fig. 6) is used for both control loops in supervising output voltage and current. Therefore, the gain in both control loops must be adjusted so the output range returns a positive value between zero and +2.5 V. That is done by selecting the feedback loop resistors for IC9B and IC11 which are connected as differential amplifiers. For example, if we’d like to have the output voltage in the range from zero to 40 V, IC9B’s gain must be 2.5 / 40 = 0.0625 (in effect, the output signal measurement must be attenuated by a factor of 16).

In practice, due to component tolerances, it is likely the highest values (e.g. 40 V) will not be reached, and a few tens of mV below maximum voltage will be the actual limit when the maximum DAC voltage is applied to the non-inverting input of IC9A.

The same problem can be expected on the other end of the voltage range; the minimum DAC voltage will not get the output voltage down to zero, but to only a few tens of mV above zero. This issue is more important, because it requires a negative DAC voltage – not possible with the DAC chip used (IC17, Fig. 6) without adding an additional operational amplifier. Fortunately such “shrinking of range” can be easily overridden with two simple changes:

• at the high end, we need to change the gain factor, and
• at the low end, move the reference ground potential from zero to, say, 50 mV (applied on IC9B and IC11 non-inverting inputs)

The voltage loop gain (for IC9B) is set to ~0.061 with a combination of 7.5 kΩ (for R42, R49) and 124 kΩ (for R47, R48). For the current loop (IC11), the gain is reduced from an “ideal” of 50 (i.e., 5 A across a 10 mΩ sense resistor gives 50 mV and 2.5 V / 0.05 V = 50) to 47.56 by using combination of 39 kΩ (R58, R65) and 820 Ω (R59, R68).

A new reference ground potential of about 50 mV is derived from a +2.5 V reference (IC15) by using the voltage divider R31, R38, and buffering it via IC10B. The offset on the lower programmed output value must be taken into account in firmware, however.

Current sensing and ranges

The output current is measured by the voltage drop across a current sense resistor (R61 and R67) for two ranges: LOW (up to 50 mA) and HIGH (up to 5 A). It is important to take into account any heating of the high range current sense resistor, since it decreases accuracy because its resistance is temperature dependent. Choosing a resistor with a low TCR even while keeping dissipation low will be best. Using the 10 mΩ the dissipated power will be 250 mW. The resistor chosen for R67 has a TCR of 20 ppm/oC (declared for 20 to 60 oC).

Selecting the current range is done by switching between two current sense resistors using MOSFETs Q12 and Q13 with low Rds(on) that is important when high range is selected to reduce the heating which might affect measurement precision regardless of the current sense resistor temperature stability (TCR).

Digital control

The post-regulator is an analog circuit controlled by analog control loops. Any control function done digitally (e.g., via MCU firmware) requires signal conversion. Four SPI devices are added to support this requirement (Fig. 6):

• Dual channel 16-bit Digital to Analog Converter,
• Four channel (multiplexed) 15-bit delta-sigma (ΔΣ) Analog to Digital Converter,
• 16-bit I/O expander
• Temperature sensor

Fig. 6: Digital control, temperature sensor, voltage reference and remote programming

Digital to analog converter (DAC)

The DAC (IC17) is used to control the voltage and current for the power supply. Using a SPI bus, the MCU communicates with the DAC to program a new voltage at the DAC’s outputs (U_SET and I_SET). This chip also includes a power-on reset circuit which ensures that the DAC outputs power up at zero, and remains there until an explicit command from the MCU firmware takes place.

The range of voltage the DAC can manage is determined by the voltage at its reference pin (Vref) which is connected to the precision voltage reference of +2.5 V (IC15).

Analog to digital converter (ADC)

The ADC (IC19) is equipped with a four channel input multiplexer, and can manage up to 2 000 samples per second. It’s used to measure voltage and current control loops levels (U_MON, I_MON), but also the DAC outputs (U_SET, I_SET). The ADC used is a 16-bit bipolar device which gives 15-bit resolution (positive half) of the full scale (the negative half is not fully used; it monitors to some extent down-programmer sinking).

16-bit I/O expander

An SPI I/O expander (IC14) is used to collect various digital signal inputs and to enable/disable various functions as shown in table below for both standard and basic model.

Temperature sensor

On-board temperature measurement is used for software based OTP (over-temperature protection) and it is achieved using the dedicated SPI temperature sensor (IC16) that is positioned close to power pre-regulator switches (Q1, Q2). It provides temperature with ±2 °C (max.) accuracy from -40 °C to +85 °C.

Remote programming

It is already stated that output voltage is regulated with CV control loop that is consists of IC9A and IC9B that is programmed using the DAC’s U_SET output. Additionally, the DCP405 offers voltage programming by supplying a positive analog signal (+2.5 V for the full scale) on the push-in terminal input X3-1 (and X3-2 as return). Only one reference signal can be used at a time which is managed with an analog multiplexer/switch (IC17). The default setting is internal (i.e. DAC output). Analog programming is faster, but additional care must be taken to stay within the safe working range even though there is protective TVS diode ZD3.

Mode of operation detection and indications

When its output is enabled, the DCP405 can work in one of the following operational modes:

• CV (constant voltage): the voltage control loop circuit (IC9) is setting the output voltage, and CV LED is active
• CC (constant current): the current control loop (IC10A, IC11) is setting output voltages, and thereby limiting output current, and CC LED is active,
• UR (unregulated, i.e. not regulated): neither the output voltage nor output current are controlling the DCP405’s output, and both LEDs are active. In normal operation this mode is entered for a very short time while regulation is changed from CV to CC mode or vice versa. However, if DCP405 stuck in this mode that is indication that regulation is not possible, i.e. the output cannot be set to programmed voltage or current.

The CC and CV circuits use comparators (IC20A, IC20B) that compare control loop outputs (U_SERVO, I_SERVO) against LOOP_CTRL signal, or simply the voltage difference on diodes D11, D13 that separates CV and CC control outputs. The signals produced are level shifted for TTL inputs (using the R84, R86 and R96, R100 voltage dividers).

Fig. 7: CV/CC detection and indication, OVP with triac/MOSFET crowbar

OVP crowbar

The OVP (over-voltage protection) circuit is added to act as a very fast protection in situations when output voltage erroneously rise above set value. It purpose is to protect DCP405 when e.g. battery or other power source is connected to the output terminals with voltage higher the programmed. It also protects connected load in case that something badly wrong is happened with the post-regulator that it voltage uncontrollably rises. The OVP circuit is consists of two main parts: fast comparator (IC21) and “crowbar” circuit where triac Q15 and MOSFET Q19 act as crowbar controlled by Q17 and Q20. Voltage divider R88, R92 connected to the output voltage sets comparator threshold that is set to about 5 % above set voltage.

Voltage sensing

Output voltage can be “sensed” locally or remotely. In the first case the sense inputs is connected to the power output (OUTF+, POST_OUT-). In the second case, the connection is done via the load’s input terminals using a separate cable connected directly to the load’s terminals. The firmware manages this through the signal relay (K1). The remote sensing cable can be shielded, but the cable shield must be connected to an PE terminal (X3-3) only on one end to avoid ground loop problems.

Fig. 8: Remote sensing reverse polarity protection, output terminals, remote sense relay

Remote voltage sensing is necessary to insure precise output voltage programming regardless of output current. It is essentially impossible to deliver power to a load with 1 mV precision without remotely sensing the voltage at the load’s input terminal, perhaps at the end of a cable just half a meter away from the output terminals. Output currents of a few amperes through insufficiently robust connection cables, or to load terminals with a resistance in miliohms, could easily produce a voltage drop across the cable from a few milivolts to even a few hundred milivolts. When using remote sensing, the output voltage actually supplied to the load is not measured at the power outputs but at the connected load terminals. The CV control loop (IC9B, Fig. 5) can compare that voltage against the programmed one, and all the voltage drops along the cable will have no effect. The technique is generally referred to as “Kelvin sensing”, or 4-wire measurement technique.

Remote sense reverse polarity detection and protection

Exposing the voltage sensing inputs to some external connection has disadvantages, however. The major one, not always obviously so, is that any or both of the sense cables can be mistakenly connected in a reverse polarity fashion that can ends up with unexpected results for the connected load. Internally, local sensing will be correct because the signal relay (K1) will insure the correct connection to the voltage control circuitry.

When remote inputs are disconnected from the load input power connectors, the DCP405 can still work safely because they will still be properly polarized thanks to R105, R106 and R111, R113. There will be only a small deviation in output voltage because of the addition of about 2 x 1 kΩ to the input voltage divider of IC9B.

However, if a sense wire is connected to the opposite polarity power output, there will be a serious fault condition for the input signal will have no relation to the channel attempting to ensure correct voltage and current to the load. There will be a maximum error bias within the CV control loop; it will try to compensate, and the end result will be the maximum possible voltage on the output (i.e. 40 V). This could easily result in irreparable damage to the connected load, especially if the set output current is high.

To avoid some of these unfortunate events, a reverse polarity detection circuit (Q22, Q24) has been added in parallel with the remote sensing inputs. It has two purposes: first, to immediately decrease output voltage, and to generate a SENSE_ERR signal (Q23) that will notify MCU to immediately disable output.

Reverse polarity power output protection

Mistakenly connected load such as battery to the power terminals could results with damage of one or more sections. Therefore TVS diode (ZD5) is connected to the outputs. Replaceable fuse (F2) connected in series limits stress applied on diode.

PCB layout

Fig. 9: PCB Top (cyan) and bottom (blue) layer

DCP405 module measurements

Load transient response testing using MOSFET switch

The load transient response illustrates a power supply’s ability to respond to abrupt changes in load current. The simplest way to achieve that is to use a MOSFET as a fast switch that will connect an additional load in parallel, increasing output current. The output voltage is shown on the scope image in yellow trace and the voltage on the MOSFET input in blue.

Fig. 1: Load transient response tested with MOSFET switch

Load transient response testing using a closed loop load transient tester

Load transient response (or recovery) can be measured more accurately using the dedicated tester described here. Additionally, remote sensing has to be deployed and oscilloscope probe has to be applied on the power output terminals. Result is shown in Fig. 2 for step load of 1 A, while output voltage was 12 V.

Fig. 2: Transient response measured with load tester

Short circuit recovery

Testing short circuit can be also done using the MOSFET switch, but that is directly connected to the power supply’s output terminals. The output voltage is set to 6 V. The output current is also set to a maximum value of 5 A. On Fig. 3, the yellow trace is the output voltage, and the blue trace the MOSFET gate signal. Measured recovery from a shorted output is below 2 ms.

Fig. 3: Short circuit recovery

Capacitive load

The Capacitive load testing is performed by simply connecting a capacitor to the output terminals with oscilloscope probe already connected, A huge output voltage drop is expected from an uncharged capacitor. Fig. 4 shows what happened when the output voltage is set to 30 V and a 10 000 μF electrolytic capacitor is connected. The output after recovery remains stable, without sign of oscillation.

Fig. 4: Output voltage drop when a 10 000 μF uncharged capacitor is connected

When down-programmer is present and activated (that is a default for the DCP405 module) it is important to check how it behaves with huge capacitive load connected while programmed output voltage varies. Fig. 5 shows voltage that output voltage rises and falls without visible oscillations when 2200 μF is connected on the output and no resistive load is presented. The down-programmer needs only 20 ms to discharge such huge load (charged to 30 V). It has to dissipate that in heat. Therefore performing such testing with high frequency will rise the main heatsink temperature considerably, but MCU will acts by increasing cooling fan speed accordingly.

Fig. 5: Charge and discharge of 2200 μF capacitor (Down-programmed enabled)

Inductive load

The DCP405 module behavior with the connected inductive load is tested by repetitively applying 100 μH power inductor using once again the MOSFET switcher. Output voltage is set to 30 V and current to 5 A. Power output (yellow trace) does not shows any sign of oscillation.

Fig. 6: Output voltage with 100 μH inductive load connected

Output voltage programming (internal DAC)

Testing the output voltage programming can demonstrate undesirable overshoots or undershoots when the output voltage is changed rapidly. In addition this test can give us an idea of responsiveness of the complete system (i.e. power supply firmware, and the settling time of the output). The result shown in Fig. 7 was generated by step change the output voltage from 5 V to 40 V, with no load connected. The programming period is just 6 ms (167 Hz).

Fig. 7: Fast programming (via SCPI LIST), full range, no load

The rising time without load connected for full range step (i.e. 0 to 40 V) is shown on Fig. 8. and falling time (with down-programmer activated) on Fig. 6.

Fig. 8: Output voltage rising time (no load, full range)

Fig. 9: Output voltage falling time (no load, full range)

Output voltage programming (external signal source)

The DCP405 power module can be also programmed from an external source using the protected input accessible via the front panel push-in connector. As in the case of internal programming, +2.5 V is required for full scale. In this operating mode it is possible to measure the maximum settling time because the input analog control signal is applied directly to the CV control loop.

A square wave and sine wave programming external signals are used to get results shown in Fig. 10 and Fig. 11. Since sine wave programming could goes up to 400 Hz it could be used to emulate ripple of fully rectified mains ripple (i.e. 100 or 120 Hz).

Fig. 10: Output voltage programming from external source (100 Hz square wave)

Fig. 11: Output voltage programming from external source (400 Hz sine wave)

Change the mode of operation (CV/CC)

The DCP405 changes its operational mode when a particular programmed output value is reached. A sudden change in resistance that could change a mode of operation must be “smooth” – no oscillation nor overshooting are permitted during a transition. This test was performed by repetitively connecting and disconnecting an additional load with a MOSFET switcher driven by the signal generator (blue trace). The output voltage was set to 40 V and current limited to 500 mA. Therefore when the right load is applied, the DCP405 module should change mode from CV to CC which will cause the output voltage to drop as shown on Fig. 12.

Fig. 12: Mode of operation changes

Power on, forced power off, standby and soft reset

When the power module is powered on or off, the output voltage should show no signs of overshoot. Powering on with output voltage set to 30 V is shown on Fig. 13. and powering off on Fig. 14.

Fig. 13: Power on, Vout=30 V, no load connected

Fig. 14: Power off (AC main unplugged), Vout=30 V, no load connected

Entering standby mode is equal to powering off but preformed under firmware control. Therefore its possible to disable power output first and then remove the input power. The results is visible on Fig. 15.

Fig. 15: Entering the stand-by mode, Vout = 25 V, no load connected

Executing soft start is similar to standby mode but without removing input power. Therefore the output voltage drop is even faster since post-regulator control circuits remain functional, output voltage is set to zero, and output capacitor discharge is assisted by down-programmer (Fig. 16.).

Fig. 16: Output voltage drop on soft reset

Down-programmer

The down-programmer circuit rapidly draws off the energy stored in the output capacitor and connected device’s input capacitor. Effectively, it sinks the current from the capacitors back inside the power module where it is dissipate into heat. If programmed voltage drop in short period of time (tens of milliseconds) is large (e.g. 30 V to 0 V), the output voltage without down-programmer cannot be set as it is shown in Fig. 17. The same voltage drop can be easily accomplished with down-programmer circuit enabled (Fig. 18.)

Fig. 17: 30 V step without load and down-programmed disabled

Fig. 18: 30 V step without load and down-programmed enabled

HW (crowbar) OVP

The DCP405 module comes with both software and hardware OVP (over-voltage protection). The response time of the software based OVP is limited by the execution speed of firmware that take care of all modules and has to periodically check if set OVP threshold is reached or not. It could be too slow when protection of the sensitive connected device is needed that cannot tolerate more then few percents over its nominal supply voltage.

Operation of the hardware based OVP on the other side is not affected with other tasks that MCU has to accomplish since it is accomplished by dedicated circuit to monitor output voltage. Therefore it can act as fast as that circuit can reacts (i.e. its crowbar element in the first place).

Hardware OVP circuit has fixed threshold level that is set to approximately 5% above programmed output voltage. On Fig. 19, the output voltage is set to 30 V and “error” voltage of 31.5 V is applied from external source on the DCP405’s power output terminals. The response time is within 20 μs that is almost two order of magnitude better then software based OVP. The similar response time of about 30 μs can be measured for lower set output voltage, e.g. 3.3 V as shown on Fig. 20.

Fig. 19: OVP tripped on Vout = 30 V

Fig. 20: OVP tripped on Vout = 3.3 V

Output ripple and noise (PARD)

The PARD (Periodic and Random Deviation) that exists on the power output is caused mainly by switching power pre-regulator and to some extent by bias power supply noise because the post-regulator circuit has limited ability to reject such switching noise. Since PARD consists of low level, broadband signals, major test set concerns are ground loops, proper shielding, and impedance matching. PARD measurement setup is shown on Fig. 21. To block the DC current a 4.7 μF capacitor is connected in series with the signal path, and to eliminate cable ringing and standing waves 50 Ω in-line terminator is used. Protective Earth (PE) of DSO and power module are directly connected to reject common mode noise as shown on Fig. 22.

Fig. 21: PARD measurement setup

Fig. 22: PARD measurement setup on DSO side

On Fig. 23 is shown DSO own noise when its input is shorted to ground and give us an idea about error that should be taken into account when measuring low level signals such as PARD.

Fig. 23: DSO noise (grounded input)

On the power module side, an additional 22 μF elco + 1 μF MLCC are used where probing is taken place (Fig. 24) because we cannot perform measurement directly on the Cout that is tens of millimeters far away behind the power module front panel. That gives us result shown on Fig. 25 for output current of 1.5 A.

Fig. 24: PARD measurement on power module output with decoupling, Iout = 1.5 A

Fig. 25: Output ripple and noise, Iout = 1.5 A

As an example of how setup of such measurement is sensitive, the PARD is also measured on the output of BNC adapter without additional output decoupling on the power terminals (Fig. 26). The results looks much worse but still below 10 mVpp.

Fig. 26: PARD measurement on BNC adapter, Iout = 1.5 A

Fig. 27: Output ripple and noise, Iout = 1.5 A

Thermal measurements

Components that are on the power path are exposed to the highest thermal stress due to various loses when DCP405 is delivering the maximum current, i.e. 5 A. Handheld thermal camera Seek Reveal Pro RQ-EAAX is used to inspect temperature of few critical components. The DCP405 module under test was inserted in Slot #1 of the BP3C backplane and the cooling fan is running on the highest speed as it is defined by firmware control algorithm in that case.

The pre-regulator’s power inductor temperature can be seen on Fig. 28. Its temperature is about 60 oC, but we can see on the picture that highest captured temperature is 75 oC and it belongs to area around power MOSFET (Q1) and diode (D2).

Fig. 28: Pre-regulator’s power inductor, Iout = 5 A

Next area of interest is post-regulator’s “pass” transistors (Q3, Q4) packages that are mounted on the main heatsink. As shown on Fig. 29. their package’s temperature are equal that means they are evenly loaded thanks to balancing resistors.

Fig. 29: Post-regulator’s "pass" BJTs, Iout = 5 A

The highest captured temperature on Fig. 29. belongs to balancing resistors R25, R26 as it is shown on Fig. 30.

Fig. 30: Post-regulator’s balancing resistors, Iout = 5 A