4. Common command reference
This section summarizes the mandatory subset of IEEE 488.2 commands required for any SCPI compliant instrument.
Common command |
Description |
Clears all status data structures |
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Programs the Standard Event Status Enable register bits |
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Reads the Standard Event Status Register |
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Returns the UNIQUE identification of the BB3 |
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Operation Complete Command used for program synchronization |
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Recalls the BB3 state stored in the specified storage location |
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Reset BB3 to the initial state |
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Stores the current BB3 state in the specified storage location |
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Enables bits in the Status Byte enable register. |
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Reads the Status Byte register |
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Generates a software trigger |
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Returns Self-Test results |
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Waits until all pending commands are completed |
4.1. *CLS
Syntax |
*CLS |
Description |
Clear Status Command. This command clears all status data structures in the BB3:
The corresponding condition and enable registers are unaffected. If *CLS immediately follows a program message terminator (<NL>), then the output queue and the MAV bit are also cleared. |
Return |
None |
Related Commands |
*ESR? STATus:OPERation[:EVENt] STATus:OPERation:INSTrument[:EVENt] STATus:OPERation:INSTrument:ISUMmary[<n>][:EVENt] STATus:QUEStionable[:EVENt] STATus:QUEStionable:INSTrument[:EVENt] STATus:QUEStionable:INSTrument:ISUMmary[<n>][:EVENt] SYSTem:ERRor |
4.2. *ESE
Syntax |
*ESE {<value>} *ESE? |
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Description |
Standard Event Status Enable Command. This command sets the Standard Event Status Enable register bits in the BB3. Those settings determine which events of the Standard Event Status Event register (see *ESR?) are allowed to set the ESB (Event Summary Bit) of the Status Byte register. A 1 in the bit position enables the corresponding event. All of the enabled events of the Standard Event Status Event Register are logically ORed sets the Event Summary Bit (ESB) of the Status Byte Register. A STATus:PRESet command does not clear the bits in the Status Byte register. See also Section 3.1 in this document. |
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Parameters |
Name |
Type |
Range |
Default |
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<value> |
NR1 |
0 – 255 (A decimal value which corresponds to the binary-weighted sum of the bits in the register. See also table in Section 3.1). |
– |
Return |
The query reads the enable register and returns a decimal value which corresponds to the binary-weighted sum of all bits set in the register. |
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Usage example |
To enable bit 2 (decimal value = 4), bit 3 (decimal value = 8), and bit 7 (decimal value = 128), the corresponding decimal value would be 140 (4 + 8 + 128): *ESE 140 Read value of the Standard Event Status Enable register: *ESE? 140 |
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Errors |
-200,"Execution error" |
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Related Commands |
*CLS *ESR *RST STATus:PRESet |
4.3. *ESR?
Syntax |
*ESR? |
Description |
Standard Event Status Register (see Section 3.2) Query. Reading the Standard Event Status Event register clears it. |
Return |
The BB3 returns a decimal value which corresponds to the binary-weighted sum of all bits in the register. |
Usage example |
If ERRor (bit 2) is set: ESR? 4 |
4.4. *IDN?
Syntax |
*IDN? |
Description |
Identification query for the UNIQUE identification of the BB3. (see also IEEE 488.2 10.14). |
Return |
The following system parameters will be displayed: <vendor>, <model>, <serial number>, <firmware>. The <model> include information about the CPU in use in brackets and could be STM32F7 or Simulator. More information about the simulator can be found in Section 9. |
Usage example |
*IDN? Envox,EEZ BB3 (STM32F7),00001,v0.1 |
4.5. *OPC
Syntax |
*OPC *OPC? |
Description |
Operation Complete Command. The command is mainly used for program synchronization. It causes the BB3 to set the OPC bit (bit 0) of the Standard Event Status register when the BB3 has completed all pending operations *OPC. Pending operations are complete when:
Query whether the current operation is completed and the query returns 1. See also IEEE 488.2 Section 12.5 – 12.8. |
Return |
Query causes the BB3 to place a 1 in the output buffer when all pending operations are completed. *OPC? does not suspend processing of commands. |
Usage example |
*OPC? 1 if current operation is not completed: *OPC? 0 |
4.6. *RCL
Syntax |
*RCL {<profile>} |
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Description |
This command recalls the BB3 state stored in the specified storage location. The BB3 has ten storage locations in non-volatile memory to store BB3 states. It is not possible to recall the BB3 state from a storage location that is empty or was deleted (Error 400 will be generated). When the firmware is started for the first time, storage locations 1 through 9 are empty (location 0 has the power-on state).
The BB3 uses location 0 to automatically save the state of the BB3 at power down. |
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Parameters |
Name |
Type |
Range |
Default |
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<profile> |
NR1 |
0 – 9 |
– |
Return |
None |
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Usage example |
*RCL 2 |
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Errors |
400,"Cannot load empty profile" |
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Related Commands |
*SAV MEMory:STATe:DELete MEMory:STATe:RECall:AUTO MEMory:STATe:RECall:SELect SYSTem:POWer |
4.7. *RST
Syntax |
*RST |
Description |
Reset Command. Restores the BB3 to its initial state (as predefined in the BB3 firmware, see Section 8.2) and clears the error queue. The reset command does NOT affect calibration data, nor any of saved configuration profiles (0 to 9). When *RST is issued, all outputs are set to OFF, and voltage and current are programmed to 0. The power up sequence is started. All SPI peripherals are reinitialize except the controller if an active Ethernet connection exists. |
Return |
None |
Usage example |
*RST MEMory:RECall:AUTO SYSTem:POWer |
Related Commands |
*RST *SAV MEMory:STATe:CATalog? |
4.8. *SAV
Syntax |
*SAV {<profile>} |
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Description |
This command stores the current instrument state in the specified storage location. Any state previously stored in the same location is overwritten without generating any errors. The BB3 has nine storage locations in non-volatile memory which are available to the user for storing BB3 states. The following channel and system parameters are stored in the non-volatile memory:
Users can assign an arbitrary name to each of locations 1 through 9 using the MEMory:STATe:NAME command.
A reset (*RST command) does not affect the configurations stored in memory. Once a state is stored, it remains constant until it is overwritten using this command or specifically deleted using the MEMory:STATe:DELete command.
The BB3 uses location 0 to automatically hold the state of the BB3 at power down. |
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Parameters |
Name |
Type |
Range |
Default |
<profile> |
NR1 |
1 – 9 |
– |
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Return |
None |
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Usage example |
*SAV 2 |
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Related Commands |
*RCL *RST MEMory:STATe:CATalog? MEMory:STATe:NAME MEMory:STATe:DELete |
4.9. *SRE
Syntax |
*SRE {<value>} *SRE? |
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Description |
Enable bits in the Status Byte enable register (see Section 3.2). |
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Parameters |
Name |
Type |
Range |
Default |
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<value> |
NR1 |
0 – 255 (A decimal value which corresponds to the binary-weighted sum of the bits in the register. See also table in Section 3.1). |
– |
Return |
Query the Status Byte enable register. The BB3 returns a decimal value which corresponds to the binary-weighted sum of all bits set in the enable register. |
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Usage example |
*SRE 32 |
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Related Commands |
*STB |
4.10. *STB?
Syntax |
*STB? |
Description |
Read Status Byte Query. This query reads the Status Byte register (see Section 3.2), which contains the status summary bits and the Output Queue MAV bit. The Status Byte is a read-only register and its bits are not cleared when it is read.
A serial poll also returns the value of the Status Byte register, except that bit 6 returns Request for Service (RQS) instead of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When the MSS bit is set, the BB3 has one or more reasons for requesting service. |
Return |
The BB3 returns a decimal value which corresponds to the binary-weighted sum of all bits in the register. |
Usage example |
If OPER (bit 7) is set: *STB? 128 |
Related Commands |
*SRE |
4.11. *TRG
Syntax |
*TRG |
Description |
This command generates a trigger to the trigger subsystem which has selected a bus (software) trigger as its source (TRIGger[:SEQuence]:SOURce BUS). |
Return |
None |
Usage example |
Generate a trigger operation after 5 seconds: TRIG:SOUR BUS TRIG:DEL 5 INIT *TRG |
Errors |
-211, "Trigger ignored" 304,"Incompatible transient modes" 307,"List lengths are not equivalent" |
Related Commands |
*WAI ABORt INITiate TRIGger[:SEQuence]:DELay TRIGger[:SEQuence]:SOURce |
4.12. *TST?
Syntax |
*TST? |
Description |
Self-Test Query. The self-test query causes an internal self-test, and places a response into the Output Queue indicating whether or not the BB3 completed the self-test without detected errors.
Note: All all terminal connections must be removed while the internal self-test is being performed.
If an active Ethernet connection exists, testing of the Ethernet controller will be skipped. You can use DIAGnostic[:INFOrmation]:TEST? for to produce a detailed report of the latest self-test.
If a fan is installed, and not running, this command will start it for the short time to obtain speed information. |
Return |
0 or 1 depends of the self-test results. See also DIAGnostic[:INFOrmation]:TEST?. |
Usage example |
If all tests passed: *TST? 0 If one or more tests failed: *TST? 1 |
Related Commands |
DIAGnostic[:INFOrmation]:TEST? SYSTem:BEEP:STATe |
4.13. *WAI
Syntax |
*WAI |
Description |
Not implemented yet
The Wait-to-Continue Command causes the BB3 to wait until all pending commands are completed before executing any other commands.
Pending operations are as defined under the *OPC command. |
Return |
None |
Usage example |
For example, the *WAI command can be used to make a voltage measurement after an OUTPut ON command has completed: OUTPut ON;*WAI;:MEASure:VOLTage? |
Related Commands |
*OPC |